In order to explain the background of the present invention, a prior art semiconductor device testing device (hereinafter referred as "a tester") is described with reference to FIG. 1:
The reference numeral 1 designates a semiconductor device to be measured (hereinafter referred to as "DUT" (device under a test)). The numeral 2 designates a tester which includes a constant voltage source 7 and a constant current source 8 (both hereinafter referred to as "PMU" (precision measurement unit)). The numerals 1a, 1b, 1c , . . . , 1l designate input/output terminals of the DUT 1. The PMUs 7 and 8 are those which are normally included in a tester for the DC measurement of a semiconductor device. The DUT 1 has such a structure that the input/output terminal 1a is connected with a bonding pad 4 which is fine-processed on the semiconductor chip 3 through a conductor wire 1a' such as a gold or aluminium fine wire. The numeral 5 designates a package including the semiconductor chip 3 and the terminal 1a.
The confirmation of the electrical connection between the DUT 1 and the tester 2 is executed by applying a voltage or a current to the terminals 1a to 1l of the DUT 1 by the constant voltage source 7 or the constant current source 8 included in the tester 2, and measuring the value of the current or the voltage.
FIG. 3 shows an electric circuit inside the DUT 1 viewed from the bonding pad 4 wherein the portion at the right side beyond the broken lines constitutes a circuit in the semiconductor chip of the DUT 1. A protection circuit is normally adopted at the input/output terminals of the semiconductor device, and a diode 5 and a resistance 6 are used to form a protection circuit in FIG. 2 as generally employed. The electrical connection between the DUT 1 and the tester 2 is confirmed by measuring the forward current of the diode 5, thereby enabling detection of a breakage of a wire between the tester 2 and the DUT 1, and a breakage of a fine-processed wire such as aluminium wire from one of the terminals 1a to 1l of the DUT 1.
A method for detecting the breakage of a wire is exemplified with reference to FIG. 4:
When a constant current source 8 having a current value Io (.mu.A) is connected to a terminal 4, the voltage Vo generated by the forward voltage of the diode 5 and the resistance 6 becomes as follows: EQU Vo=Io(.mu.A).times.Ro(.OMEGA.)
When a wire between the ground GD of the semiconductor device and the earth GT of the tester 2 is broken, the above-described value of Vo varies to a great extent. So, when it is detected a value beyond the expected range of the value Vo (Vomin to Vomax), it can be judged that the electrical connection between the DUT 1 and the tester 2 is insufficient or in a bad condition. Otherwise, the same effect can be obtained by connecting a constant voltage source 7 and detecting the current value as shown in FIG. 5.
Under such a prior art testing method, detection is performed by using the constant current source 8 or the constant voltage source 7. However, in these devices a time period of approximately several m-secs is required to obtain an exact predetermined voltage or current value. Furthermore, the constant voltages or current sources applicable for such use are expensive, thereby restricting the number of these devices included in a tester. Accordingly, the time required for the confirmation of electrical connections of DUT having a plurality of input/output terminals has increased with the increase of the number of the terminals. Furthermore, although it is possible to reduce the test time in using PMUs by including the same number of PMUs in the tester as that of the terminals to be measured, it is disadvantageous to change the tester function for the purpose of this connection test as the PMUs are expensive.
As another prior art there is Japanese Patent Publication No. Sho. 57-18593 entitled "A testing method for a tri-state output semiconductor memory device".